The invention relates to a semiconductor device. More particularly, the invention relates to a semiconductor device comprising a dual poly gate and a method for fabricating the same.
In the fabrication of a dual CMOS transistor, an NMOS region includes an N-type impurity doped polysilicon layer as a lower gate electrode and a PMOS region includes a P-type impurity doped polysilicon layer as a lower gate electrode. A surface channel transistor is formed in the NMOS region and the PMOS region. A metal layer, such as a tungsten (W) layer, is formed as an upper gate electrode over a lower gate electrode to obtain a low word line resistance.
A surface channel transistor is required due to the continued increase in semiconductor device integration and on the necessity of a low operation voltage. However, the dual CMOS transistor has limits, such as boron penetration and gate depletion in a PMOS transistor. Because a barrier layer is formed between the upper gate electrode and the lower gate electrode, it is possible that the gateon insulator (“GOI”) may fail, the ring oscillator may delay, and the resistance increase of a word line can be generated depending on the kinds and the formation conditions of the barrier layer, thereby degrading the performance of the transistor.
The barrier layer may be selected from the group consisting of a tungsten nitride (WN) layer, a tungsten silicide (WSix)/tungsten nitride (WN) layer, and a titanium (Ti)/tungsten nitride (WN) layer, and combinations thereof. When a tungsten layer is used as the upper gate electrode, a low word line surface resistance can be obtained. However, when the barrier layer is formed with a stacked structure including a tungsten silicide (WSix)/tungsten nitride (WN) layer, the barrier layer can react with boron in the PMOS region.
For example, a thermal treatment process is performed after a word line is formed to activate impurities. However, the tungsten silicide layer does not intercept diffusion of boron. The boron of the PMOS region reacts with nitride of the tungsten nitride layer to form a boron (B)-nitride (N) insulating film, thereby increasing a surface resistance. As a result, a gate delay is caused in the device operation. The insulating film results in signal delay, because the insulating film has a similar insulating property to that of a SiO2 film. The tungsten nitride film does not serve as a barrier layer to generate silicidation of the upper gate electrode. This causes the lower gate electrode and tungsten silicide (WSix) to agglomerate, thereby degrading the function as an electrode.
When the barrier layer is formed with a stacked structure of a Ti/WN layer, the Ti layer interrupts boron diffusion of the lower gate electrode to inhibit formation of the B—N insulating film. However, the tungsten nitride (WN)/tungsten (W) layer is formed to have a small grain size due to effects of titanium (Ti) layer or titanium nitride (TiN) layer, thereby increasing the resistance of the word line.